1. Field of the Invention
The present invention relates to a method for manufacturing copper wires on a substrate of a flat panel display device and, more particularly, to a method for manufacturing electrodes or conductive lines made of copper of a thin film transistor on a substrate of a flat substrate display device.
2. Description of Related Art
To improve the signal transmission speed of a driving signal for a thin film transistor and to meet the requirements of large panel size and high picture quality for a flat panel display device, copper of the low resistance is used as metal conductive lines or gate electrodes on a flat panel display device to solve the problem of delayed driving signals.
However, many problems such as oxidation, moisture corrosion, poor adhesion, and diffusion between layers need to be solved for the application of the copper wires on the substrate of the flat panel display devices. So far, these problems are improved by the multilayered copper wires. Unfortunately, the multilayered copper wires also increase the difficulty of the following etching process.
On the other hand, it is known that the key point of improving the yield of the active matrix thin film transistor is to control the taper angle of thin films on the substrate. In the conventional method for manufacturing these substrates, the taper angle defined by etching process usually exceeds the tolerant range. Therefore, the taper angle is controlled by adjusting the conditions of the etching process. For example, the taper angle is controlled through applying special etching solution in wet etching, or applying special gas in dry etching under some specific process conditions.
For the etching of the multilayered metal (e.g. Ti—Cu—Ti), the etched width of each metal layer is different since the etching rate for each metal layer is different. This also results in the formation of voids between layers, or poor step-coverage in the following process. Furthermore, the difficulty in controlling of the etching process conditions could bring about short between copper wires, damage to the active channel, or even the disablement for the devices.
U.S. Pat. No. 6,887,776 discloses a method for manufacturing the thin film transistor. The method is achieved by depositing a metal layer of a thin film transistor by electroplating. The flowchart of the method for depositing a metal layer of a thin film transistor is shown in FIG. 1. The method is achieved by depositing a seed layer 210 on a substrate 200 first. The method is subsequently processed by forming a patterned photoresist 220 on the surface of the seed layer 210 to expose partial surface of the seed layer (shown in FIG. 1(a)), and electroplating a metal layer 230 on the exposed surface of the seed layer (shown in FIG. 1(b)). Finally, the photoresist is removed to produce a metal layer structure 230 shown in FIG. 1(c). However, this method cannot naturally form a metal layer with a taper angle, and so the problems caused by etching process (e.g. the short between conductive metal lines, or the damage to active channel) still need to be overcome.
Therefore, it is desirable to provide an improved method to manufacture electrodes or conductive lines made of copper with tapers on the substrate. Through the improved method, the shape of the conductive thin films can therefore be modified, the film step-coverage in the following process can be improved, the generated voids in device can be reduced, the manufacturing steps can be simplified, the complicated etching process can be avoided, and yield of the flat panel display devices can be increased.